EIC – Silicon Validation Engineer / Senior Engineer
Must have Pre/Post silicon validation experience
Experience in C Language is must.
Experience in Bare Metal & RTOS / Linux Based FW development.
Experience using FPGA and/or emulation platforms (Veloce, Palladium, SimNov)
Knowledge of x86 and/or ARM SoC Architecture
Understanding of C++ & any scripting language will be plus.
Debugging failures using waveform viewers, log files and microcode trace dumps.
Debugging software using debuggers and trace files.
Experience in using Lab equipments
Knowledge of one or more protocols; SPI, DDR, SATA, USB, AXI, PCI, PCIe, MIPI, WLAN or I2C
Strong sense of ownership, passionate, fast learner, analytical mind set.
Manage to work in tight deadline situations to achieve project goals
IN-TN-Chennai, India (Vatika Business Center)
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