Qualcomm India Private Limited
Engineering Group, Engineering Group > Hardware Engineering
Qualcomm is a company of inventors that unlocked 5G ushering in an age of rapid acceleration in connectivity and new possibilities that will transform industries, create jobs, and enrich lives. But this is just the beginning. It takes inventive minds with diverse skills, backgrounds, and cultures to transform 5Gs potential into world-changing technologies and products. This is the Invention Age – and this is where you come in.
In this role you’ll be working with IP designers, SoC engineers, Firmware and DV engineers to design the next generation GNSS IPs. You’ll be responsible for all activities related to the design and delivery of GNSS Sub-System to SoC. You’ll work closely with emulation and DV engineers to ensure the design is well tested on their respective platforms. As a Sub-System lead, you’ll ensure that the timing and power constraints are correct, the design synthesizes as expected and the front-end tool-flows are run to qualify the design.
8-12 years of experience in the design of complex ASICs
Strong expertise in RTL coding of complex designs using Verilog/SV
Proven experience in low power design methodology and designs with multiple clock domains
Knowledge of Digital Signal Processing is a plus
Strong debugging, analytical skills, and ability to solve problems independently
Strong communication skills, both verbal and written
Hands-on experience in front-end design tools
Bachelor’s or Master’s Degree in Engineering in Electronics, VLSI, Communications or related field
8 years of VLSI industry experience in Digital Design
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